Xilinx Recruitment 2020 Details:
| Job Role | Intern – Design Closure |
| Qualification | B.E/M.E/B.Tech/M.Tech |
| Experience | Freshers |
| Job Location | Hyderabad |
| Last Date | ASAP |
Detailed Eligibility:
- B.E/M.E/B.Tech/M.Tech or BS or MS in CS, EE or CE
- Background in EDA tools development preferred
- Strong background in computer algorithms and data structures.
- Strong background in C++ programming, including familiarity with boost and STL
- Excellent problem solving skills and willingness to think outside the box
- Experience with production software quality assurance practices, methodologies and procedures
- Excellent communication skills and experience working with global teams
Preferred:
Exposure to any of these areas:
- RTL Synthesis, datapath or high-level synthesis, technology mapping
- Placement and/or routing algorithms
- Static timing analysis
- FPGAs and the FPGA software tool chain
- Verilog or VHDL
- Scripting languages such as Perl or Python
- Machine learning, data analysis, pattern matching
How to Apply Xilinx Recruitment 2020 for Intern – Design Closure?
All interested and eligible candidates can apply for this position online by the following link as soon as possible.
To Apply: Click here
0 Comment to "Xilinx Recruitment 2020 for Intern – Design Closure | B.E/M.E/B.Tech/M.Tech | Hyderabad"
Post a Comment